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p reliminary w91560dn series 3-memory tone/pulse dialer with rtc and lcd display functions publication release date: may 1997 - 1 - revision a2 general description the w91560dn series ics are si-gate cmos ics that provide the signals needed for either pulse or tone dialing. they feature 3 number memories and a 12/16-digit lcd driver for displaying telephone numbers and calling time. a real time clock is included to display the time of day. the w91560dn series is fabricated using cmos technology and thus provide good performance in low voltage, low power applications. features one by 32 digits for redial three by 32 digits for one-touch direct repertory memory uses 5 6 keyboard pause, pulse-to-tone (*/t) can be stored as a digit in memory flash can be stored as a digit in memory when in store mode minimum tone output duration: 87 ms (81 ms for w91564dnf and w91565dnf) minimum interto ne pause: 87 ms tone/pulse mode pin selectable make/break ratio pin selectable dialing rate: 10 pps pause time: 3.6 sec. (2.0 sec. for w91564dnf and w91565dnf) flash break time (73 ms, 100 ms, 300 ms or 600 ms) selectable by keypad built-in 12 or 16-digit lcd driver ( 1/4 duty, 1/3 bias) selectable by mask option built-in calling timer from [00:00] to [59:59] memory check function on-chip power-on reset and clear lcd uses 3.579545 mhz tv quartz crystal or ceramic resonator uses 32768 hz crystal as rtc frequency base switchable 24-hour clock or 12-hour clock with p.m. mode by keypad 0 or 9 dialing inhibition pin for pabx systems or long distance dialing lock out on-hook debounce: 150 ms in normal mode and 20 ms in lock mode off-hook delay 300 ms in lock mode ( dp will keep low for 300 ms while off hook except the first off hook after power on reset that dp will keep high for 100 ms then go low for 200 ms) first key-in delay: 300 ms in lock mode mixed dialing allowed packaged in 64-pin plastic qfp with rtc the functions of the different dialers in the w91560dn series are shown in following table:
p reliminary w91560dn series - 2 - type no. lcd digits lock hold pause time w91560dnf 16 --- yes w91561dlnf 16 yes --- 3.6 sec. W91562DNF 12 --- yes w91563dlnf 12 yes --- w91564dnf 16 --- yes 2.0 sec. w91565dnf 12 --- yes w91560dnh 16 yes yes 3.6 sec. w91562dnh 12 yes yes note: w91564dnf/w91565dnf is only for the french market. the pause time will not be added when in pulse-to-tone function mode. pin configuration 1 64 20 w91560dnf series
p reliminary w91560dn series publication release date: may 1997 - 3 - revision a2 pin description sym. pin no. i/o function row, column inputs 18 - 21, 13 - 17 i the keyboard inputs may be used with either the standard 5 6 keyboard, an inexpensive single contact (form a) keyboard or electronic input. a valid key entry is defined by a single row being connected to a single column. xt1, xt1 22, 23 i, o a built-in inverter provides oscillation with an inexpensive 3.579545 mhz crystal or ceramic resonater. the oscillator ceases when a keypad input is not sensed after the chip is enabled and dialing is finished. the crystal frequency deviation is 0.02%. t/p mute 8 o the t/p mute is a conventional cmos n-channel open drain output. the output transistor is switched on low level during the dialing sequence (both pulse and tone mode), one-key redial break and flash break. otherwise, it is switched off. h/p mute 9 (w91560dnf, W91562DNF, w91564dnf, w91565dnf only) o the h/p mute is a conventional cmos inverter output, during pulse dialing, one-key redial break, flash break and hold functions, this pin will output an active high. it remains in a low state at all other times. lock 9 (w91561dlnf, w91563dlnf only) i the lock pin is used to prevent "0" or "9" dialing under pabx system long distance call control. when the first key input after reset is "0" or "9", all the key inputs, including the "0" or "9" key, become invalid, and the chip generates no output. the telephone is reinitialized by a reset. the following table describes the functions of the lock pin: lock pin floating v dd ss v function normal dialing "0", "9" dialing inhibited "0" dialing inhibited hks 24 i hook switch input. hks = v dd or floating: on-hook state. chip in sleeping mode, no operation. hks = v ss : off-hook state. chip enable for normal operation. hks pin is pulled to v dd by internal resistor.
p reliminary w91560dn series - 4 - pin description, continued sym. pin no. i/o function mode 12 i pulling the mode pin to v ss places the dialer in tone mode. pulling the mode pin to v dd places the dialer in pulse mode (10 pps, m/b = 2:3). floating the mode pin places the dialer in pulse mode (10 pps, m/b = 1:2). hfi , hfo 25, 10 i, o handfree control pins. a low pulse on the hfi input pin toggles the handfree control state. status of the handfree control is listed in the following table: current state input hfo dialing high yes on hook high low no off hook high low yes on hook off hook low yes off hook low on hook low no off hook high on hook high yes low hook sw. hfo next state hfi hfi hfi hfi pin is pulled to v dd by internal resistor. detailed timing diagrams are shown in figure 4(a), 4(b). dp / c6 11 o this pin is a cmos n-channel open drain output. the flash key will cause dp to go active in either pulse mode or tone mode. in lock mode, the dp keeps low for 300 ms during off-hook delay time. the timing diagram is shown as figure 1(a), 1(b), 1(c), 1(d). dtmf 6 o in pulse mode, this pin remains in low state at all times. in tone mode, it will output a dual or single tone. the detailed timing diagram for tone mode is shown in figure 2(a), 2(b), 2(c), 2(d). specified actual error % output frequency +0.28 r1 r2 r3 r4 c1 c2 c3 697 770 852 941 1209 1336 1477 699 766 848 948 1216 1332 1472 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 v lcd 29 o power supply pin for lcd driver. a 0.1 m f capacitor is connected between v lcd and v ss .
p reliminary w91560dn series publication release date: may 1997 - 5 - revision a2 pin description, continued sym. pin no. i/o function cp, cn 31, 32 i cp is the voltage control capacitor positive pin. cn is the voltage control capacitor negative pin. a 0.1 m f capacitor is connected between these two pins. com1 to com4 33 - 36 o com1 to com4 are the common signal output terminals for the 1/4 duty lcd. seg1 to seg32 37 - 64 1 - 4 o seg1 to seg32 are the 16-digit segment signal outputs. xt2, xt2 26, 27 i, o a quartz crystal oscillator provides an rtc frequency time base of 32.768 khz. v rtc1 , v rtc2 28, 30 i either v rtc1 should be connected to a 1.5v battery and v rtc2 should be connected to a capacitor 0.1 m f, which supplies the power source for the rtc. v dd , v ss 5, 7 i power input pins.
p reliminary w91560dn series - 6 - block diagram row column dtmf xt1 xt1 ram counter system clock generator location latch d/a row & column programmable counter data latch & decoder read/write (r1 ~ r4) (c1 ~ c5) control logic pulse/ control logic keyboard interface converter segment output decoder backplane signal generator com2 com1 com3 l.c.d. com4 xt2 xt2 real time clock generator tone hks mode hfi h/p mute hfo lock dp t/p mute v dd ss v v rtc1 v rtc2 v lcd cp cn functional description keyboard operation c1 c2 c3 c4 c5 dp / c6 1 2 3 e m1 hold1 r1 4 5 6 f4 m2 hold2 r2 7 8 9 chk m3 apset r3 */t 0 # r/p rtc/hour set r4 f1 f2 f3 okr tim/min vx */t: * in tone mode and p ? t in pulse mode e: store digit f1, f2, f3, f4: flash keys m1 - m3: one-touch memory r/p: redial and pause function key okr: one-key redial function
p reliminary w91560dn series publication release date: may 1997 - 7 - revision a2 rtc: real time clock toggle key tim: a. display last calling time b. start and/or stop counting up calling time hour and min: adjusting time setting keys hold1, hold2: hold function keys apset: toggle to set rtc display mode set: toggle the rtc set function on/off. chk: a. check dialing number b. check dialing time c. memory check notes: d1, ..., dn, d1', ..., dn': 0, ..., 9, * /t, # mn: direct memory location m1, ..., m3 normal dialing off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn 1. d1, d2, ..., dn will be dialed out. 2. dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. redialing 1. off hook (or on hook & hfi ?? ), d1 , d2 , check memory (or number store ), d3 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p a. the r/p key can execute the redial function only after the first key-in is off-hook; otherwise, it will invoke the pause function. b. the contents of redial memory are d3, ? , dn. c. redial memory can be checked in memory check mode. ( chk , r/p ) d. if the redialing length oversteps 32 digits, the redialing function will be inhibited. 2. off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , busy, okr a. if the dialing of d1 to dn is finished, pressing the okr key causes the pulse output pin to go low for 2.2 seconds (break time) with 0.6 seconds of pause time automatically added. b. if the pulses of the dialed d1 to dn have not finished, okr will be ignored.
p reliminary w91560dn series - 8 - digits c. the one-key redialing function timing diagram is shown in figure 3. 3. off hook (or on hook & hfi ?? ), d1 , d2 , * (or # ), d3 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p or off hook (or on hook & hfi ?? ), d1 , d2 , * (or # ), ..., dn , busy, okr a. only d1, d2 will be dialed out for w91564dnf and w91565dnf. b. d1, d2, * (or #) , d3, ..., dn will be dialed out for other dialer. number entry 1 . off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , e (many times same as one times), mn , on hook d1, d2, ..., dn will be stored in memory location mn and will be dialed out. 2 . off hook (or on hook & hfi ?? ), e , d1 , d2 , ..., dn , e (could be skipped), mn , on hook a. d1, d2, ..., dn will be stored in memory location mn but will not be dialed out. b. r/p and */t keys can be stored as a digit in memory, in store mode, r/p is the pause function key. c. the store mode is released after the store function is executed or when the hook switch is depressed. 4. off hook , e , mn the redial contents excluding memory dialing will be copied to memory location mn. 5. the key-in number should not exceed 32 digits. if the number exceeds 32 digits, it will not be stored in memory. repertory dialing one-touch direct repertory dialing. off hook (or on hook & hfi ?? ), mn or r/p , okr ) access pause
p reliminary w91560dn series publication release date: may 1997 - 9 - revision a2 off hook (or on hook & hfi ?? ), d1 , d2 , r/p , d3 , ..., dn , busy, come on hook , off hook (or on hook & hfi ?? ), r/p 1. the first r/p functions as a pause key and the second as a first key-in redial key. 2. the pause function can be stored in memory. 3. the pause function is executed in normal dialing, redialing, or memory dialing. 4. the pause duration time is 3.6 sec. (2.0 sec. for w91564dnf and w91565dnf only) 5. the pause function timing diagram is shown in figure 5. pulse- to-tone (*/t) off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn , * /t , d1' , d2' , ..., dn' 1. if the mode switch is set to pulse mode, then the output signal will be: d1, d2, ? , dn, pause (3.6 sec), d1', d2', ? , dn' (pulse) (tone) 2. if the mode switch is set to tone mode, then the output signal will be: d1, d2, ? , dn, *, d1', d2', ? , dn' (tone) (tone) 3. the dialer remains in tone mode after the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. the pulse-to-tone function timing diagram is shown in figure 6(a), 6(b). flash (f = f1, f2, f3, f4) off hook (or on hook & hfi ?? ), f 1. the dialer will execute flash break time of 600 ms (f1), 300 ms (f2), 73 ms (f3) or 100 ms(f4) and pause time of 1s before the next digit (except flash key) is dialed out. 2. the flash key has first priority in normal dialing but an insert flash can be stored into memory when flash is the first digit in memory. in this condition, only one flash key can be released to the user. a. for the digit sequence e, f1, d1, d2, d3, e, mn, the sequence stored in mn will be f1, d1, d2, d3. b. for the digit sequence e, d1, f1, d2, d3, e, mn, the sequence stored in mn will be d1, d2, d3. c. for the digit sequence f1, d1, d2, d3, e, mn, the sequence stored in mn will be d1, d2, d3. 3. the system will return to the initial state after the flash break time is finished. 4. keyboard functions are inhibited when flash break is being executed. 5. the flash timing daigram is shown in figure 7. hold key
p reliminary w91560dn series - 10 - off hook (or on hook & hfi ?? ), hold1 (or hold2 ) 1.the hold function is toggled on and off by the hold1 or hold2 key. when the hold function is toggled on, the hold mark (dot of digit_4) will be lit and all key-ins (except hold keys and icon keys) will be ignored. 2. the following examples show the hold function being toggled on and off: a. off hook , hold1 (or hold2 ), hold1 (or hold2 ) b. off hook , hold1 (or hold2 ), hfi ?? c. off hook , hold1 (or hold2 ), on hook , hfi ?? d. on hook & hfi ?? , hold1 (or hold2 ), hfi ?? 3. hold1 and hold2 have the same function in the off-hook state. the difference between hold1 and hold2 are shown as follows: a. if off hook , hold1 (or hold2 ), on hook , hold1 is entered, then the dialer will be off-line. if off hook , hold1 (or hold2 ), on hook , hold2 is entered, then the dialer will be on hold. b. if on hook & hfi ?? , hold1 (or hold2 ), hold1 is entered, then the dialer will be off-line. c. if on hook & hfi ?? , hold1 (or hold2 ), hold2 is entered, then the dialer will be on hold. 4. the function timing diagram is shown in figure 8(a), 8(b), 8(c). adjusting time setting off hook (or on hook & hfi ?? ), set , hour , min , set (or on hook ) 1. only hour and min keys are valid in rtc set mode. 2. hours and minutes count forward as long as the hour or min key is pressed. 3. the on/off function of set is tolggled, and the dialer is initialized after the set key is toggled. 4. if the dialing sequence d1, d2, ..., dn (including flash and pause) has not finished, set will be ignored. rtc display mode off hook (or on hook & hfi ?? ), rtc
p reliminary w91560dn series publication release date: may 1997 - 11 - revision a2 1.the real time clock display mode can be toggled on and off by the rtc key. 2. the icon display will not change when the rtc display mode is entered and set. apset 1. in the off-hook state, press the apset key to toggle the rtc function to 24-hour clock mode or 12- hour clock with p.m. mode. 2. the default mode is a 12-hour clock with p.m. mode. check key off hook (or on hook & hfi ?? ), chk , r/p (or okr , mn , ..., etc.) the contents of redial (or memory) is displayed on the lcd when either r/p or okr is key in. tim off hook (or on hook & hfi ?? ), d1 , d2 , ..., dn (or redialing or repertory dialing ), conversatio n 1. if no key is pressed after dialing is finished, the lcd will display a timer after 6 seconds. 2. if the dialing sequence d1, d2, ..., dn has not finished, tim will be ignored. 3. the timer will be initialized by the flash and toggle set key. mixed dialing 1. definition of mixed dialing: in mixed dialing, a new sequence may be pressed after the previous sequence has been sent out completely. the following are examples of mixed dialing: example 1: normal dialing + repertory dialing +... example 2: repertory dialing + normal dialing + repertory dialing +... example 3: redialing + normal dialing + repertory dialing +... 2. there is no limitation on the number of digits and sequences in mixed dialing. 3. the content of mixed dialing may be a combination of normal dialing, memory dialing, or one-key redialing. absolution maximum ratings
p reliminary w91560dn series - 12 - parameter symbol rating unit dc supply voltage v dd - v ss -0.3 to +7.0 v v il v ss - 0.3 input/output voltage v ih v dd +0.3 v v ol v ss - 0.3 v oh v dd +0.3 power dissipation p d 120 mw operating temperature t opr -0.5 to +70 c storage temperature t stg -55 to +125 c note: exposure to conditions beyond those listed under absolute maximum ratings may adversely affect the life and reliability of the device. electrical characteristics dc characteristics (v dd - v ss = 2.5v. f osc = 3.58 mh z , t a = 25 c, all outputs unloaded.) parameter sym. conditions min. typ. max. unit operating voltage v dd - 2.0 - 5.5 v operating current i op tone, unloaded - 0.5 0.7 ma pulse, unloaded - 0.4 0.5 standby current i sb hks = 0, unloaded and no key entry - - 15 m a memory retention current i mr hks = 1 v dd = 1.0v - - 0.5 m a tone output voltage v to row group rl = 10 k w 130 150 170 mvrms pre-emphasis col/row v dd = 2.0 to 5.5v - 2 3 db
p reliminary w91560dn series publication release date: may 1997 - 13 - revision a2 dc characteristics, continued parameter sym. conditions min. typ. max. unit dtmf distortion thd rl = 10 k w v dd = 2.0 to 5.5v - -30 -23 db dtmf output dc level v tdc v dd = 2.0 to 5.5v 1.0 - 3.0 v dtmf output sink current i tl v to = 0.5v 0.2 - - ma dp output sink current i pl v po = 0.5v 0.5 - - ma common output voltage v ch v rtc = 1.5v 4.2 4.5 4.8 v v cl - 0 0.3 common output current i ch - -20 - - m a i cl - 20 - - segment output voltage v sh v rtc = 1.5v 4.2 4.5 4.8 v v sl - 0 0.3 segment output current i sh - -5 - - m a i sl - 5 - - rms voltage v on - 2.4 2.6 - vrms across a segment v off - - 1.5 1.7 average dc offset voltage v dc - - - 100 mv hfi high voltage v hfih - 0.8 v dd - v dd v hfi low voltage v hfil - - - 0.2 v dd v t/p mute output sink current i tml v tmo = 0.5v 0.5 - - ma h/p mute output drive current i hmh v hmo = 2.0v 0.5 - - ma h/p mute output sink current i hml v hmo = 0.5v 0.5 - - ma keypad input drive current i kd v i = 0v 4 - - m a keypad input sink current i ks v i = 2.5v 200 - - m a keypad resistance r k - - - 5 k w control input pull up/down resistor r cip hfi 100 - - k w hks input pull high resistor r hk - - 500 - k w
p reliminary w91560dn series - 14 - ac characteristics (v dd - v ss = 2.5v , f osc. = 3.58 mhz , t a = 25 c, all outputs unloaded.) parameter sym. conditions min. typ. max. unit key-in debounce t kid - - 20 - ms key release debounce t krd - - 20 - ms off-hook delay time t ofd - - 300 - ms first key-in delay time t fkd - - 300 - ms on-hook debounce time t ohd unlock - 150 - ms lock - 20 - pulse mute delay t md mode = v dd - 40 - ms mode = floating - 33.3 - pre-digit-pause t pdp mode = v dd - 40 - ms (10 pps) mode = floating - 33.3 - inter-digit pause (auto dialing) t idp 10 pps - 800 - ms make/break ratio m:b mode = v dd - 40:60 - % mode = floating - 33:67 - tone output duration t td - - 87 - w91564dnf and w91565dnf only - 81 - ms inter-tone pause t itp - - 87 - ms f1 - 600 - flash break time t fb f2 - 300 - ms f3 - 73 - f4 - 100 flash pause time t fp f1, f2, f3, f4 - 1 - s pause time t p r/p - 3.6 - w91564dnf and w91565dnf only 2.0 s one key redialing break time t rb - - 2.2 - s one key redialing pause time t rp - - 0.6 - s lcd frame frequency f lcd - - 32 - hz
p reliminary w91560dn series publication release date: may 1997 - 15 - revision a2 rtc dc characteristics (v rtc = 1.5v ,v ss = 0v , f osc . = 32,768 hz , t a = 25 c, all outputs unloaded.) parameter sym. conditions min. typ. max. unit supply voltage v rtc - 1.2 1.5 1.8 v supply current i rtc no load - 2.0 4.0 m a osc. starting time t osc - - - 3 s osc. output built-in cap. c o cl = 12.5 pf - 25 - pf osc. in trimmer cap. c trim - 5 - 35 pf frequency stability d f/f v dd - v ss = 1.3 to 1.6v - - 1 ppm notes : 1. crystal parameters suggested for proper operation are rs < 100 ohms, lm = 96 mh, cm = 0.02 pf, cn = 5 pf, cl = 18 pf, and fosc. = 3.579545 mhz 0.02% 2. crystal oscillator accuracy directly affects these times. timing waveforms t idp hks key in dp t/p mute h/p mute 2 b m t idp t idp t kid t idp t pdp 2 m b t md 4 t krd 3 < 600ms < 300ms t kid dtmf osc. low oscillation oscillation t pdp t kd figure 1(a). normal dialing timing diagram (pulse mode without lock function)
p reliminary w91560dn series - 16 - timing waveforms, continued hks key in dp t/p mute h/p mute t ofd 2 b m t idp t idp t pdp t kid t idp t pdp 2 m b t md t md 4 t krd dtmf osc. low oscillation oscillation t fkd 3 < 600ms < 300ms t kid t kd figure 1(b). normal dialing timing diagram (pulse mode with lock function) hks key in dp t/p mute h/p mute r/p t kid b m t idp t idp t pdp m b t md t md dtmf osc. low oscillation t idp < 600ms t krd t kd figure 1(c). auto dialing timing diagram (pulse mode without lock function)
p reliminary w91560dn series publication release date: may 1997 - 17 - revision a2 timing waveforms, continued hks key in dp t/p mute h/p mute t ofd b m t idp t idp t pdp m b t md t md dtmf osc. low oscillation r/p t kid t idp t fkd < 600ms 300ms figure 1(d). auto dialing timing diagram (pulse mode with lock function) hks key in h/p mute t/p mute dtmf 5 t kid 2 low 4 t krd 3 < 600ms < 300ms t td osc. dp oscillation oscillation 2 t itp t itp t itp t kid high t itp oscillation t krd t kd figure 2(a). normal dialing timing diagram (tone mode without lock function)
p reliminary w91560dn series - 18 - timing waveforms, continued hks key in h/p mute t/p mute dtmf 5 t kid 2 low 4 t krd 3 < 600ms < 300ms t td osc. t ofd dp oscillation oscillation t fkd 2 t itp t itp t itp t kd figure 2(b). normal dialing timing diagram (tone mode with lock function) hks key in h/p mute t/p mute dtmf low r/p t krd < 600ms osc. dp oscillation t td t itp t itp t kid high t kd t ohd figure 2(c). auto dialing timing diagram (tone mode without lock function)
p reliminary w91560dn series publication release date: may 1997 - 19 - revision a2 timing waveforms, continued hks key in h/p mute t/p mute dtmf r/p t krd < 600ms low 300ms t td osc. t ofd dp oscillation t fkd t itp t itp t kd t ohd figure 2(d). auto dialing timing diagram (tone mode with lock function) hks key in dp t/p mute h/p mute dtmf osc. t ofd b m t pdp low oscillation okr t md t fkd < 600ms 300ms okr kid t b m t pdp t idp t rb t rp t idp figure 3. one-key redial timing diagram
p reliminary w91560dn series - 20 - timing waveforms, continued t/p mute hks hfo osc. dp hfi h/p mute high osc. ofd t fkd t osc. osc. ohd t ohd t low figure 4(a). handfree timing diagram (with lock function) t/p mute hks hfo osc. dp hfi h/p mute high ohd t ohd t high low figure 4(b). handfree timing diagram (without lock function)
p reliminary w91560dn series publication release date: may 1997 - 21 - revision a2 timing waveforms, continued hks key in dp t/p mute h/p mute dtmf osc. low oscillation < 600ms 2 t kid r/p t ofd 300ms 3 b m t pdp m t idp b t pdp t fkd t md t p t md oscillation figure 5. pause function timing diagram (pulse mode) hks key in dp t/p mute h/p mute dtmf osc. oscillation < 600ms 2 t kid */t t ofd 300ms 3 b m t pdp t idp t fkd t md t p oscillation t itp figure 6(a). pulse-to-tone timing diagram
p reliminary w91560dn series - 22 - timing waveforms, continued hks key in dp t/p mute h/p mute dtmf osc. oscillation < 600ms 2 t kid */t t ofd 300ms 3 b m t pdp t idp t fkd t md oscillation t itp * t 3 itp figure 6(b). pulse-to-tone timing diagram (w91564dnf and w91565dnf only) t/p mute f f hks t kid dtmf osc. oscillation dp key in low hpm mute 3 t fp t fb f t kid t kid t itp figure 7. first priority flash timing diagram
p reliminary w91560dn series publication release date: may 1997 - 23 - revision a2 timing waveforms, continued hks off hook on hook hfo h/p mute chip enble low high hfi t/p mute hold key figure 8(a). hold and handfree timing diagram note: the hold key cannot be enabled when the chip is disabled. t/p mute hfi hks off hook hfo high h/p mute chip enble hold key figure 8(b). hold and handfree timing diagram note: the hfi and hold key inputs will toggle the hfo signal; as soon as either hfi or hold key is activated, the hfo signal will go high and previous activated inputs will be ignored.
p reliminary w91560dn series - 24 - timing waveforms, continued t/p mute hfi hks on hook hfo high h/p mute chip enble hold1 key figure 8(c). hold and handfree timing diagram note: changing the state of the hks signal from high to low will initialize the hfo and h/p mute signals.
p reliminary w91560dn series publication release date: may 1997 - 25 - revision a2 lcd display format a. normal dialing off hook or press "hfi" switch dial " 0123456789123456" and "78" (here tone mode was selected). blinking b. redialing, memory dialing, one touch dialing press "r/p", "okr" or "mn" key (redial or mn = "8123456789") off hook or press "hfi" switch (here tone mode was selected). blinking
p reliminary w91560dn series - 26 - c. memory check press "chk" key press "any key" (display 17 to 19 digits) press "m1" key (display 1 to 16 digits) off-hook or press "hfi" switch (m1= "886p35p770066pp7126", and here pulse mode was selected) blinking blinking d. timer function a. press "tim" key (display last calling time) off-hook or press "hfi" switch (here pulse mode was selected) blinking
p reliminary w91560dn series publication release date: may 1997 - 27 - revision a2 dial "9375607" if "9375607" is dialed comlepted, the system will start timer after 6 seconds (timer will start counting up) press "tim" key (timer will stop) b. dial "9375607" if "9375607" is dialed completed press "tim" key (timer will start counting up) off-hook or press "hfi" switch (here pulse mode was selected) blinking
p reliminary w91560dn series - 28 - press "m2" key (m2 = "314p4430256") press "chk" key the system will go back to timer mode after 6 seconds (timer count up continuously) after the flash break is executed blinking after the flash pause is executed blinking press "f1", "f2", "f3" or "f4" key (the timer will stop and the lcd will display a flash mark and flash pattern)
p reliminary w91560dn series publication release date: may 1997 - 29 - revision a2 e. rtc setting function on-hook (display real time) off-hook, before press "set" key entering "setting mode" (press "set" key) blinking (here tone mode was selected) adjusting "minute" (press "min" key) adjusting "hour" (press "hour" key) on-hook or press "set" key (toggle) (hour counts forward while the key is depressed) (minute counts forward while the key is depressed) (here on-hook was selected) blinking
p reliminary w91560dn series - 30 - lcd pattern for data 2 3 4 * # p t p 5 6 7 8 9 e check f lock 0 1 icon1 icon3 icon4 icon5 icon6 icon7 icon2 notes: icon1: pause icon2: the icon will be blinking after power on. icon3: flash icon4: hold icon5: handfree icon6: timer icon7: tone
p reliminary w91560dn series publication release date: may 1997 - 31 - revision a2 lcd panel pattern 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 1 7 2 9 3 0 3 1 3 2 (seg) 1 2 3 c o m 4 (com) c o m c o m c o m bonding pad diagram 64 63 62 60 61 59 58 57 56 55 54 53 52 1 2 3 4 5 6 7 8 9s-2 10 11 12 13 14 15 16 17 18 19 25 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 9s-1 29 28 27 26 24 23 22 21 20 (0,0) notes: 1. the substrate must be connected to v ss .
p reliminary w91560dn series - 32 - 2. the chip size is 2940 3630 m m 2 pad list pad no. pad name pin no. x y pad no. pad name pin no. x y 1 seg29 1 -1335.00 1430.70 33 ocm1 33 1335.00 -1307.90 2 seg30 2 -1335.00 1294.50 34 com2 34 1335.00 -1166.10 3 seg31 3 -1335.00 1158.50 35 com3 35 1335.00 -1024.30 4 seg32 4 -1335.00 1022.30 36 com4 36 1335.00 -882.50 5 v dd 5 -1335.00 883.40 37 seg1 37 1335.00 -746.30 6 dtmf 6 -1335.00 665.20 38 seg2 38 1335.00 -607.50 7 v ss 7 -1335.00 515.50 39 seg3 39 1335.00 -471.30 8 t/p mute 8 -1335.00 373.50 40 seg4 40 1335.00 -335.30 9s-1 h/p mute 9* -1335.00 229.30 41 seg5 41 1335.00 -199.10 9s-2 lock 9* -1335.00 88.20 42 seg6 42 1335.00 -63.00 10 hfo 10 -1335.00 -49.80 43 seg7 43 1335.00 73.00 11 dp / c6 11 -1335.00 -191.80 44 seg8 44 1335.00 209.20 12 mode 12 -1335.00 -327.80 45 seg9 45 1335.00 345.20 13 col1 13 -1335.00 -467.80 46 seg10 46 1335.00 481.40 14 col2 14 -1335.00 -627.20 47 seg11 47 1335.00 617.40 15 col3 15 -1335.00 -769.20 48 seg12 48 1335.00 753.60 16 col4 16 -1335.00 -928.60 49 seg13 49 1335.00 889.60 17 col5 17 -1335.00 -1070.60 50 seg14 50 1335.00 1102.10 18 row1 18 -1335.00 -1226.40 51 seg15 51 1335.00 1270.80 19 row2 19 -1335.00 -1368.40 52 seg16 52 941.30 1657.50 20 row3 20 -1080.40 -1679.90 53 seg17 53 749.00 1657.50 21 row4 21 -841.70 -1679.90 54 seg18 54 534.80 1657.50 22 xt1 22 -598.40 -1679.90 55 seg19 55 398.60 1657.50 23 xt1 23 -453.20 -1679.90 56 seg20 56 262.60 1657.50 24 hks 24 -307.90 -1679.90 57 seg21 57 126.40 1657.50 25 hfi 25 -167.90 -1679.90 58 seg22 58 -9.60 1657.50 26 xt2 26 24.20 -1679.90 59 seg23 59 -145.80 1657.50 27 xt2 27 188.80 -1679.90 60 seg24 60 -281.80 1657.50 28 vrtc1 28 326.30 -1679.90 61 seg25 61 -418.00 1657.50 29 vlcd 29 488.50 -1679.90 62 seg26 62 -554.00 1657.50 30 vrtc2 30 636.30 -1679.90 63 seg27 63 -757.70 1657.50 31 cn 31 798.50 -1679.90 64 seg28 64 -932.00 1657.50 32 cp 32 946.30 -1679.90 note: * is bonding option.
p reliminary w91560dn series publication release date: may 1997 - 33 - revision a2 headquarters no. 4, creation rd. iii, science-based industrial park, hsinchu, taiwan tel: 886-3-5770066 fax: 886-3-5792697 http://www.winbond.com.tw/ voice & fax-on-demand: 886-2-7197006 taipei office 11f, no. 115, sec. 3, min-sheng east rd., taipei, taiwan tel: 886-2-7190505 fax: 886-2-7197502 winbond electronics (h.k.) ltd. rm. 803, world trade square, tower ii, 123 hoi bun rd., kwun tong, kowloon, hong kong tel: 852-27513100 fax: 852-27552064 winbond electronics north america corp. winbond memory lab. winbond microelectronics corp. winbond systems lab. 2730 orchard parkway, san jose, ca 95134, u.s.a. tel: 1-408-9436666 fax: 1-408-9436668 note: all data and specifications are subject to change without notice.

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